Peripheral Sensor Interface (PSI5)
The PSI5 IP-module performs communication according to the PSI5 specification V1.3.
The Peripheral Sensor Interface is an interface for automotive sensor applications. PSI5 is an open standard based on existing sensor interfaces for peripheral airbag sensors, already proven in millions of airbag systems.
This module supports many additional features as discussed today in the standard organization.
The PSI5 interface provides a current loop based serial communication link typically used to connect airbag sensors or other peripheral devices.
While the physical layer is done externally, this module manages protocol handling and data representation to the application. Note that there is no on chip phy, i.e. the current to voltage and voltage to sync pulse translation is done externally.
Receive data on a PSI5 channel can be set up according to the underlying application. In particular the number of bits forming one value is configured.
The message storage consists of a 32-bit buffer register for each channel and an additional 32-bit register containing the 24-bit time stamp and additional status bits. These 64 bits per frame are additionally stored in a buffer of 32 lines per channel.
In Host to sensor communication mode, the module can provide regular sync pulses and select between internal and external timer/trigger resources. It supports as well CPU to sensor communication, e.g. for setting up the sensor and retrieving sensor status information.
The register set of the PSI5 module can be accessed directly by the CPU for configuration, data read out and status query.
Feature list
Conformance with PSI5 protocol specification V1.3
Data rates of 125 kbit/s and 189 kbit/s supported
4 PSI5 channels implemented
All implemented channels are working independently in parallel
Supports 6 sensor slots per channel
Asynchronous and synchronous data transmission modes (control by micro controller in synchronous mode)
Decoding manchester protocol
Error recognition in manchester code
Configurable data word length 8, 10, 16, 20, 24 bit according to standard (PSI5 V1.3)
Support of non standard V1.3 frame length: 11… 33 bit
CRC check of received sensor data implemented but CRC code transparent
Support of Enhanced Serial Messages according to SENT SAE J2716 JAN 2010
24-Bit time stamp (resolution: 1µs)
Storage of up to 32 frames per channel with time stamp
FIFO access and management
Buffer overrun detection
Buffer Memory Status Overview Registers
Support of ECU to Sensor communication
Three 64-bit downstream data registers for data input, data preparation and data output
Downstream data transmission by variation of pulse length (2.0)
Downstream data transmission by leaving out sync pulses (V1.3)
Staggering Sync Pulses of all channels to avoid too many channels sending sync pulses in parallel
Generation of 3 or 6 bit CRC for downstream data
Start sequence and CRC generator for downstream data
One sum interrupt for general events
One sum interrupt on selectable errors
Sticky interrupt flags, error interrupt optional (default disabled)
Optional output inversion for use of external open drain transistor
Optional input inversion for use of external open transistor for level shifting
Functional description
The PSI5 module communicates with the external world via one I/O line for each channel. The PSI5RXx lines are the receive data input signals. If the optional unidirectional mode is used, the signals PSI5TXx are transmitted on separate GPIO ports. Receive and transmit path are always routed to two different ports.
shows a global view of the PSI5 interface.
Figure 1. General block diagram of the PSI5 interface