• Flexible functional configuration by application software

    • Frame formatting configuration

    • Various operation modes

    • TX-link baudrate support (10 MHz/20 MHz SysClk(System Clock)): 5 MBaud (low speed) and 320 MBaud (high speed)

    • TX-link baudrate support (25 MHz SysClk): 6.25 MBaud (low speed) and 320 MBaud (high speed)

    • RX-link baudrate support (20 MHz SysClk): 5 MBaud (low speed), 20 MBaud (medium speed) and 320 MBaud (high speed)

    • RX-link baudrate support (10 MHz SysClk): 5 MBaud (low speed) and 320 MBaud (high speed)

    • RX-link baudrate support (25 MHz SysClk): 6.25 MBaud (low speed) and 320 MBaud (high speed

  • Transmit HSSL frames to external devices and handle all protocol relevant topics

    • Writing a single 8, 16, or 32-bit data value into the register of a target device

    • Supports transfers of a long 256-bit streaming data block

    • Automatic frame transfer ID (IDentity) generation for detection of dropped frames

    • Acknowledge for command and stream frames

  • Receive HSSL frames from external devices and handle all protocol relevant topics

    • Reading single data from an 8, 16, or 32-bit register of a target device

    • Supports reception of a long 256-bit streaming data block

  • Transfers protected by CRC16 ( 16 bit Cyclic Redundancy Check)

  • Support of 32-bit address range

  • Read and write HSSL frame data either to or from system address space

    • Support of Direct Memory Access(DMA) driven multiple register write or read transfers

    • Two stage FIFOs (First in, First Outs) for transmitting and receiving streaming data

  • Flexible event signaling and interrupt structure

    • Programmable timeouts for detection of blocked answer transfers

    • Remote trigger of an event or an interrupt in the target device by the initiator

    • Total 17 interrupt lines, four types of channel specific interrupt per channel and one module interrupt

  • Automatic FIFO flush when entering the run mode, for error handling

  • Read and write access protection by an external Memory Protection Unit (MPU)

  • Identification of the target by the JTAG ID (Joint Test Action Group Identification ) number

  • Multi-slave connection supports up to three slaves

  • The communication interface is based on IEEE 1596.3 LVDS IOs (Low Voltage differential Signaling Input Outputs)and provides driver swing amplitude configuration