Multiple VMT instances (VMTx) are distributed over the chip. Each VMTx handles up to 32 SSHs. The figure shows the system level view of the VMTx, SSH instances, and SRAMs.

Figure 1. VMT block diagram

Note that STP connections from SMM as well as ROM support hardware (RSH) connections shown in the figure above are not relevant for the user and will not be explained in greater detail herein.

Different functional blocks such as the CPU, LMU, or CAN for example, may have one or more SRAMs inside them. Every SRAM is embedded in its own SSH module, with its own SSH registers and MBIST logic. Each SSH is separately connected to a VMTx through internal interfaces.

Each VMTx is connected to the SPB and provides access to the registers of the SSHs connected to it.

Each SPB access is internally forwarded and returned, to and from the corresponding SSH by the VMTx.