Flash driver commands
This section contains a list of custom commands exposed by the target MCU's Flash driver.
psoc6/cat1c/traveo2/xmc5xxx sflash_restrictions
The command enables or disables writes to SFlash regions other than USER, NAR, TOC2, and KEY.
psoc6 sflash_restrictions <mode>
cat1c sflash_restrictions <mode>
traveo2 sflash_restrictions <mode>
xmc5xxx sflash_restrictions <mode>
The command can be called at any time.
mode
– Mandatory; specifies the behavior of SFlash programming. The possible values:
0 – Erase/Program of SFlash is prohibited.
1 – Erase and Program of USER/TOC/KEY is allowed.
2 – Erase of USER/TOC/KEY and program of USER/TOC/KEY/NAR is allowed.
Be aware that the NAR sub-region cannot be overwritten or erased if the new data is less restrictive than the existing data.
Warning:
Unintentional writing to this region may corrupt your device!
Erase of USER/TOC/KEY and program of the whole SFlash region is allowed.
Writes to SFlash regions other than USER/TOC/KEY/NAR is possible only on the VIRGIN silicon, so the mode=3 option is mostly intended for internal use. It is useful for flash boot developers and validation teams. Note that erase (programming with 0x00 for PSOC™ 6, or 0xFF for XMC7xxx and TRAVEO™ T2G MCUs) is performed only for the USER, TOC2, and KEY regions; it is skipped for other SFlash regions regardless of this command.
Example (KitProg3 & PSOC™ 6 MCU):
openocd -s ../scripts -f interface/kitprog3.cfg -f target/infineon/cy8c6xxx.cfg -c "init; reset init; psoc6 sflash_restrictions 2; shutdown"
psoc6/cat1c/traveo2/xmc5xxx allow_efuse_program
Allows or disallows writes to the EFuse region. Can be called any time. Writes to the EFuse region are skipped by default. Be aware that EFuses are one-time programmable. Once an EFuse is blown, there is no way to revert its state. EFuse programming must be allowed for lifecycle transitions to work.
psoc6 allow_efuse_program <on|off>
cat1c allow_efuse_program <on|off>
traveo2 allow_efuse_program <on|off>
xmc5xxx allow_efuse_program <on|off>
Example (KitProg3 & PSOC™ 6 MCU):
Writes 1 bit to the EFuse region at address 0x907003FF of the PSOC™ 6 MCU:
openocd -s ../scripts -f interface/kitprog3.cfg -f target/infineon/cy8c6xxx.cfg -c "init; reset init; psoc6 allow_efuse_program on; flash fillb 0x907003FF 1 1; flash read_bank 3 d:/dump_efuse.bin 0x3FF 0x1; shutdown"
psoc6/cat1c/traveo2/xmc5xxx reset_halt
The command simulates a broken vector catch on PSOC™ 6, XMC7xxx, TRAVEO™ T2G and XMC5xxx MCUs.
psoc6 reset_halt <mode>
cat1c reset_halt <mode>
traveo2 reset_halt <mode>
xmc5xxx reset_halt <mode>
The command retrieves the address of the vector table from the VECTOR_TABLE_BASE registers, detects the location of the application entry points, sets a hardware breakpoint at that location, and performs a reset of the target. The type of the reset can be specified by the optional
mode
parameter.
Parameters:
mode– (Optional) The type of reset to be performed. Possible values aresysresetreq
and
vectreset
. If not specified,
SYSRESETREQ
is used for the CM0 core and
VECTRESET
is used for other cores in the system.
Example (KitProg3 & PSOC™ 6 MCU):
openocd -s ../scripts -f interface/kitprog3.cfg -f target/infineon/cy8c6xxx.cfg -c "init; reset init; psoc6 reset_halt vectreset; shutdown"
psoc4/cat1c/traveo2/xmc5xxx ecc_error_reporting
Enables or disables the ECC error reporting during OpenOCD operations.
psoc4 ecc_error_reporting <on|off>
cat1c ecc_error_reporting <on|off>
traveo2 ecc_error_reporting <on|off>
xmc5xxx ecc_error_reporting <on|off>
OpenOCD supports the detection and reporting of ECC errors during the flash read operation. In the current implementation, OpenOCD reads word-by-word a requested amount of data and checks for the ECC status after each Read. This ensures all ECC errors for all memory locations are properly detected. If an ECC error occurs, OpenOCD retrieves the address of the faulty location from the hardware. All ECC errors along with their locations are reported to the user by means of warning messages. This process will be performed until all requested data has been read.
Note:
In this section, psoc4 means only PSOC™ 4 HV devices.
Example (KitProg3 & XMC7000 MCU):
openocd -s ../scripts -f interface/kitprog3.cfg -f target/infineon/cytxbb.cfg -c "init; reset init; cat1c ecc_error_reporting on; shutdown"
cat1c/traveo2/xmc5xxx wflash blank_map [first_sector [last_sector | 'last']]
Displays per-word validity map of the given sectors of work flash. It accepts two optional parameters with the following rules:
If no parameters are given, command displays validity map for all sectors
If one parameter is given, parameter means sector number and the command displays validity map for given sector
If two parameters are given, command displays validity map for range of sectors (param1 ... param2). The word 'last' can be used as a parameter #2 (same as erase_sector ).
Example (KitProg3 & XMC7000 MCU):
> cat1c wflash blank_map 0
WorkFlash word validity map:
0x14000000 (#000): -+++-+-+--------------------------------------------------
0x14000100 (#000): ----------------------------------------------------------
0x14000200 (#000): ----------------------------------------------------------
0x14000300 (#000): ----------------------------------------------------------
0x14000400 (#000): ----------------------------------------------------------
0x14000500 (#000): ----------------------------------------------------------
0x14000600 (#000): ----------------------------------------------------------
0x14000700 (#000): ----------------------------------------------------------
cat1c/traveo2/xmc5xxx wflash write_image <filename> [offset]
Programs individual 32-bit words from given file to the work flash. All data in the file that does not belong to WFlash region is skipped. All unaligned data is trimmed to make the starting address and length of the data aligned on 32-bit boundaries. Appropriate warnings are displayed in this case. Command works with elf, hex, srec and bin files. Optional offset can be specified (same as flash write_image).
Example (KitProg3 & XMC7000 MCU):
The file contains unaligned data and also data which does not belong to the WFlash region.
> cat1c wflash write_image foo.hex
Warn : Section [0x13fff950, 0x13fff991) will be skipped
Warn : Section [0x13fffdac, 0x13fffe19) will be skipped
Warn : Section [0x13fffff0, 0x1400005d) will be truncated to [0x14000000, 0x1400005c)
Warn : Section [0x14000290, 0x14000299) will be truncated to [0x14000290, 0x14000298)
Warn : Section [0x140003b0, 0x140003e5) will be truncated to [0x140003b0, 0x140003e4)
[100%] [################################] [ Programming ]
cat1c/traveo2/xmc5xxx wflash write_words <address> <word_1> [word_2] ... [word_N]
Command is similar to 'flash rmw' except:
Starting address must be aligned on 32-bit boundary
Command works with 32-bit words which must be separated with a space
Example (KitProg3 & XMC7000 MCU):
> cat1c wflash write_words 0x14000004 0xDEADBEEF 0xBAADF00D 0xBAADC0DE
> cat1c wflash write_words 0x14000014 0x01234567
> cat1c wflash write_words 0x1400001C 0x89ABCDEF
> cat1c wflash blank_map 0
[100%] [################################] [ Programming ]
[100%] [################################] [ Programming ]
[100%] [################################] [ Programming ]
WorkFlash word validity map:
0x14000000 (#000): -+++-+-+--------------------------------------------------
0x14000100 (#000): ----------------------------------------------------------
0x14000200 (#000): ----------------------------------------------------------
0x14000300 (#000): ----------------------------------------------------------
0x14000400 (#000): ----------------------------------------------------------
0x14000500 (#000): ----------------------------------------------------------
0x14000600 (#000): ----------------------------------------------------------
0x14000700 (#000): ----------------------------------------------------------
psoc6 secure_acquire
Performs acquisition of PSOC™ 64 "Secure Boot" MCUs.
psoc6 secure_acquire <magic_num_addr> <mode> <handshake> <timeout>
Parameters:
magic_num_addr
– Address in RAM to poll for the magic number. This address is different across different PSOC™ 6 MCU devices:
CYB06447, CYB06447-BL - 0x08044804
CYS0644A, CYB0644A - 0x080FE004
CYB06445 - 0x0803E004
mode
– Mode of acquisition. Possible values:
run
,
halt
.
In run mode, the command will perform reset and will wait for the "secure" application to open the corresponding access port.
In halt mode, a "secure" handshake will be performed right after reset to prepare the device for flash programming.
handshake
– Specifies whether full or short acquisition procedure should be executed. The short acquisition procedure simply waits until "secure" FW opens the given access port. This is intended for multi-core configuration when full acquisition has already been done with the other CPU core.
Possible values:
handshake
– full acquisition,
no_handshake
– short acquisition
timeout
– Timeout in milliseconds
psoc4 reset_halt
Performs the alternate acquire sequence as described in the
PSOC™ 4 MCU programming specification
.
psoc4 reset_halt
The command detects the location of the application entry points, sets a hardware breakpoint at that location, and issues a
SYSRESETREQ
reset.
Example (KitProg3 & PSOC™ 4 MCU):
openocd -s ../scripts -f interface/kitprog3.cfg -f target/infineon/psoc4.cfg -c "init; reset init; psoc4 reset_halt; shutdown"
psoc4 mass_erase
Performs mass erase operation on the given flash bank. The list of all flash banks can be obtained using
flash banks
command. This command is a shortcut and performs the same operation as the
flash erase_sector <bank_id> 0 last
command. The peculiarity of this command is that erasing of the mflash bank also erases the flashp bank. If the chip is in PROTECTED state, this command moves the protection state of the device from PROTECTED to OPEN and erases the entire flash device.
psoc4 mass_erase <bank_id>
Example (KitProg3 & PSOC™ 4 MCU):
openocd -s ../scripts -f interface/kitprog3.cfg -f target/psoc4.cfg -c "init; reset init; psoc4 mass_erase 0; shutdown"
psoc4 chip_protect
Changes the chip protection mode to PROTECTED. This mode disables all debug access to the user code or memory. Access to most registers is still available; debug access to registers to reprogram flash is not available. Protection mode can be changed back to OPEN by performing the mass erase operation described above.
psoc4 chip_protect
Example (KitProg3 & PSOC™ 4 MCU):
openocd -s ../scripts -f interface/kitprog3.cfg -f target/infineon/psoc4.cfg -c "init; reset init; psoc4 chip_protect; shutdown"
psoc4 kill_mode
Moves target from OPEN to KILL state. KILL state is a state where debug pins are switched OFF and any access to target is prohibited. Both debugging and flashing new image is impossible. This mode is useful if you have completely finalized image and there is a need to make it impossible to read out image via debug pins. From the user perspective, target executes flashed application but is not accessible via openOCD or any other tool.
Note:
This command is irreversible. So in order to prevent misuse, additionally, the variable
ALLOW_KILL_MODE
must be set to YES via openOCD arguments.
Example (KitProg3 & PSOC™ 4 MCU):
openocd -s ../scripts -f interface/kitprog3.cfg -c "set ALLOW_KILL_MODE YES" -f target/infineon/psoc4.cfg -c "init; reset init; psoc4 kill_mode; shutdown"