PSoC™ 6 datasheets
Device datasheets provide a technical overview of the device that includes the key features, hardware architecture, on-chip peripherals, various sub-systems, and package details. Electrical specifications of the device are also provided in the datasheet.
Refer to the respective Technical Reference Manual (TRM) for detailed technical information on a device family. The datasheets for the PSoC™ 6 device families are listed below.
| Device Family | Datasheet |
|---|---|
| PSOC™ 61 Programmable Line (Single Core Applications CPU: ARM® Cortex®-M4) | |
| CY8C61x4 | |
| CY8C61x5 | |
| CY8C61x6, CY8C61x7 | |
| CY8C61x8, CY8C61xA | |
| PSOC™ 62 Performance Line (Dual Core Applications CPU: ARM® Cortex®-M4, ARM® Cortex®-M0+) | |
| CY8C62x4 | |
| CY8C62x5 | |
| CY8C62x6, CY8C62x7 | |
| CY8C62x8, CY8C62xA | |
| PSOC™ 63 Bluetooth® Low Energy Connectivity Line (MCUs with on-chip Bluetooth® radio) | |
| CY8C63x6, CY8C63x7 | |
| PSOC™ 64 Secure MCU Line (Applications CPU: ARM® Cortex®-M4, Secure CPU: ARM® Cortex®-M0+) | |
| CYB064x5 Secure Boot | |
| CYB064x7 Secure Boot | |
| CYB064xA Secure Boot | |
| CYB064x7-BL Secure Boot BLE | |
| CYS064xA Standard Secure | |