AIROC™ Bluetooth®

This section includes documentation and code examples for various AIROC™ Bluetooth® features.

• AN210781 - Getting Started with PSoC™ 6 MCU with Bluetooth® Low Energy Connectivity
  • 1. Introduction
    • 1.1 Prerequisites
      • 1.1.1 Hardware
      • 1.1.2 Software
  • 2 Development Ecosystem
    • 2.1 PSoC Resources
    • 2.2 Firmware/Application Development
      • 2.2.1 PSoC Creator
        • 2.2.1.1 PSoC Creator Help
      • 2.2.2 Peripheral Driver Library ( PDL)
    • 2.3 Support for Other IDEs
      • 2.3.1 Using PSoC Creator to Target Another IDE
    • 2.4 RTOS Support
    • 2.5 Debugging
    • 2.6 CY8CKIT-062-BLE PSoC 6 BLE Pioneer Kit
    • 2.7 CySmart Host Emulation Tool and Mobile Applications
  • 3 Device Features
  • 4 Development Setup
  • 5 My First PSoC 6 MCU Design With BLE
    • 5.1 Using These Instructions
    • 5.2 Before You Begin
    • 5.3 About the Design
    • 5.4 Part 1: Create a New Project from Scratch
    • 5.5 Part 2: Implement the Design
    • 5.6 Part 3: Generate Source Code
    • 5.7 Part 4: Write the Firmware
    • 5.8 Part 5: Build the Project, Program the Device
    • 5.9 Part 6: Test Your Design
  • 6 Summary
  • 7 Related Application Notes and Code Examples
  • Appendix A. Glossary
  • Appendix B. BLE Protocol
    • B.1 Overview
    • B.2 Physical Layer (PHY)
    • B.3 Link Layer (LL)
    • B.4 Host Control Interface (HCI)
    • B.5 Logical Link Control and Adaptation Protocol (L2CAP)
    • B.6 Security Manager (SM)
    • B.7 Attribute Protocol (ATT)
      • B.7.1 Attribute Hierarchy
      • B.7.2 Attribute Operations
    • B.8 Generic Attribute Profile (GATT)
    • B.9 Generic Access Profile (GAP)
  • Appendix C. Device Features
    • C.1 System Wide Resources
      • C.1.1 CPU Subsystem: CM 4 and CM 0
      • C.1.2 IPC
      • C.1.3 Memory System
      • C.1.4 DMA
      • C.1.5 Clocking System
      • C.1.6 System Interrupts
      • C.1.7 Power Supply and Monitoring
      • C.1.8 Power Modes
    • C.2 Secure Boot
    • C.3 Programmable Digital Peripherals
      • C.3.1 UDB
      • C.3.2 Programmable TCPWM
      • C.3.3 SCB
      • C.3.4 BLESS
        • C.3.4.1 Deep Sleep Mode
        • C.3.4.2 Sleep Mode
        • C.3.4.3 Idle Mode
        • C.3.4.4 Transmit Mode
        • C.3.4.5 Receive Mode
      • C.3.5 Audio Subsystem
      • C.3.6 Serial Memory Interface
      • C.3.7 e FUSE
      • C.3.8 Segment LCD
    • C.4 Programmable Analog Peripherals
      • C.4.1 Continuous Time Block Opamps
      • C.4.2 Low - Pow er Comparator
      • C.4.3 SAR ADC
      • C.4.4 DAC
      • C.4.5 CapSense
    • C.5 Programmable GPIOs
  • Appendix D. Cypress IoT Development Tools
    • D.1 CY8CKIT-062-BLE PSoC 6 BLE Pioneer Kit
    • D.2 CySmart Host Emulation Tool
    • D.3 CySmart Mobile App
  • Document History
• BLE GATT Throughput Example
• BLE Environmental Sensing Profile Example
• BLE GAP Peripheral - GATT Client with Current Time Service
• BLE GAP Peripheral - GATT Server with Current Time Service
• BLE Beacon Example
• BLE Battery Server
• AN215671 - PSoC™ 6 MCU - Firmware Design for BLE Applications
  • 1 Introduction
  • 2 PSoC Resources
  • 3 BLE Protocol Implementation in PSoC 6 BLE
    • 3.1 BLE Host
      • 3.1.1 Generic Access Profile (GAP)
      • 3.1.2 Generic Attribute Profile (GATT)
      • 3.1.3 ATT Protocol – Organizing the Data
    • 3.2 BLE Controller
      • 3.2.1 Managing Multiple Connections
  • 4 Developing a BLE Application: Firmware Flow
    • 4.1 Implementing Low-Power BLE Design
    • 4.2 Implementing a Secure BLE Design
      • 4.2.1 Configuring Security Features Using the BLE Component Security Mode and Security Level
      • 4.2.2 Establishing Secure BLE Link : Firmware Flow
    • 4.3 Additional BLE Design Considerations
  • 5 BLE Design Examples
    • 5.1 Multi-Master Multi-Slave: Implementing Four BLE Slaves
      • 5.1.1 About the Design
    • 5.2 Multi-Master Multi-Slave: Implementing Three BLE Masters and One BLE Slave
      • 5.2.1 About the Design
  • 6 Summary
  • 7. Related Documents
  • Document History