PDL API Reference¶
The following provides a list of driver API documentation
This driver provides an API to manage the BLE ECO clock block
The CAN FD driver provides an easy method to access the CAN FD IP block registers and provides simple functionality for sending and receiving data between devices in the CAN FD network
This section describes the CAN FD Macros
This section contains interrupt bit masks to be used with:
This section contains interrupt bit masks to use with:
This section contains interrupt bit masks to be used with:
Interrupt line selection masks
Masks and bit positions of the Protocol Status Register (PSR) fields
The Crypto driver provides a public API to perform cryptographic and hash operations, as well as generate both true and pseudo random numbers
Use the client-server API to isolate the Crypto hardware from non-secure application access
The Crypto initialization configuration
Use the low-level API for direct access to the Crypto hardware
The CSD HW block enables multiple sensing capabilities on PSoC devices, including self-cap and mutual-cap capacitive touch sensing solutions, a 10-bit ADC, IDAC, and Comparator
This driver provides API functions to configure and use the analog CTB
This set of functions are for initializing, enabling, and disabling the CTB
This set of functions are for configuring basic usage of the CTB
This set of functions are specific to the comparator mode
This function enables sample and hold of the CTDAC output
This set of functions is related to the comparator interrupts
This set of functions is for controlling routing switches
These are advanced functions for trimming the offset and slope of the opamps
This set of functions impacts all opamps on the chip
The CTDAC driver provides APIs to configure the 12-bit Continuous-Time DAC
This set of functions are for initializing, enabling, and disabling the CTDAC
This set of functions are for configuring basic usage of the CTDAC
This set of functions is for controlling the two CTDAC analog switches, CVD, and CO6
This set of functions is related to the CTDAC interrupt
This driver supports one SysPm callback for Deep Sleep transition
Configures a DMA channel and its descriptor(s)
Configures the DMA Controller block, channels and descriptors
Electronic Fuses (eFuses) are non-volatile memory where each bit is one-time programmable (OTP)
Internal flash memory programming
Provides general information about flash
Specifies the parameter values passed to SROM API
The GPIO driver provides an API to configure and access device Input/Output pins
Constants to be used for setting the drive mode of the pin
Constants to be used for setting the voltage trip type on the pin
Constants to be used for setting the slew rate of the pin
Constants to be used for setting the drive strength of the pin
Constants to be used for setting the interrupt trigger type on the pin
Constants to be used for setting the SIO output buffer mode on the pin
Constants to be used for setting the SIO input buffer mode on the pin
Constants to be used for setting the SIO input buffer trip-point of the pin
Constants to be used for setting the reference voltage of SIO input buffer trip-point
Regulated output voltage level (Voh) and input buffer trip-point of an SIO pair
Constants to be used for setting the Voh and input buffer trip-point of an SIO pair
The I2S driver provides a function API to manage Inter-IC Sound
The driver supports SysPm callback for Deep Sleep transition
The inter-processor communication (IPC) driver provides a safe and reliable method to transfer data between CPUs
The functions of this layer are used in the higher IPC levels (Semaphores and Pipes)
Macro definitions are used in the driver
Functions are used in the driver
Data structures are used in the driver
Enumerations are used in the driver
The semaphores layer functions made use of a single IPC channel to allow multiple semaphores that can be used by system or user function calls
Macro definitions are used in the driver
Functions are used in the driver
Enumerations are used in the driver
The Pipe functions provide a method to transfer one or more words of data between CPUs or tasks
Macro definitions are used in the driver
Functions are used in the driver
Data structures are used in the driver
Enumerations are used in the driver
Provides access to the low-power comparators implemented using the fixed-function LP comparator block that is present in PSoC 6
The driver supports SysPm callback for Deep Sleep and Hibernate transition
The LVD driver provides an API to manage the Low Voltage Detection block
The driver supports SysPm callback for Deep Sleep transition
A MCWDT has two 16-bit counters and one 32-bit counter
The pulse-density modulation to pulse-code modulation (PDM-PCM) driver provides an API to manage PDM-PCM conversion
The driver supports SysPm callback for Deep Sleep transition
The Protected Register Access (PRA) driver used to provice access to the protected registers to a non-secure application on PSoC 64 devices
The energy profiler driver is an API for configuring and using the profile hardware block
The Protection Unit driver provides an API to configure the Memory Protection Units (MPU), Shared Memory Protection Units (SMPU), and Peripheral Protection Units (PPU)
The Real-Time Clock (RTC) driver provides an application interface for keeping track of time and date
Definitions of days in the week
Week of Month setting constants definitions for Daylight Saving Time feature
Constants definition for Months
Definition of days in current month
Definitions for RTC interrupt sources
Definitions for indicating the RTC BUSY bit
This driver configures and controls the SAR ADC subsystem block
This set of functions is for initialization and basic usage
This set of functions is for Deep Sleep entry and exit
This set of functions allows changes to the SAR configuration after initialization
This set of functions performs counts to *volts conversions
This set of functions are related to SAR interrupts
This set of functions is for controlling/querying the SARMUX switches
This set of functions is for useful configuration query
This set of enumerations aids in configuring the SAR CTRL register
This set of enumerations are used in configuring the SAR SAMPLE_CTRL register
This set of enumerations aids in configuring the SAR SAMPLE_TIME* registers
This set of enumerations aids in configuring the SAR RANGE* registers
This set of enumerations aids in configuring the SAR CHAN_CONFIG register
This set of enumerations aids in configuring the SAR INTR_MASK register
This set of enumerations aids in configuring the uint32_t muxSw itch and uint32_t muxSwitchSqCtrl registers
The Serial Communications Block (SCB) supports three serial communication protocols: Serial Peripheral Interface (SPI), Universal Asynchronous Receiver Transmitter (UART), and Inter Integrated Circuit (I2C or IIC)
Common API for the Serial Communication Block
Driver API for EZI2C Slave Peripheral
Macros to check current EZI2C activity slave status returned by Cy_SCB_EZI2C_Get Activity function
Driver API for I2C Bus Peripheral
Macros to check current I2C slave status returned by Cy_SCB_I2C_Slav eGetStatus function
Macros to check current I2C master status returned by Cy_SCB_I2C_MasterGetStatus function
Macros to check I2C events passed by cy_cb_scb_i2c_handl e_events_t callback
Macros to check I2C address events passed by cy_cb_scb_i2c_han dle_addr_t callback
Driver API for SPI Peripheral
Macros to check SPI TX FIFO status returned by Cy_SCB_SPI_GetTxFifoS tatus function or assign mask for Cy_SCB_SPI_ClearTxFifoS tatus function
Macros to check SPI RX FIFO status returned by Cy_SCB_SPI_GetRxFifoS tatus function or assign mask for Cy_SCB_SPI_ClearRxFifoS tatus function
Macros to check SPI Mater and Slave status returned by Cy_SCB_SPI_GetSlaveMasterS tatus function or assign mask for Cy_SCB_SPI_ClearSlaveMasterS tatus function
Macros to check current SPI transfer status returned by Cy_SCB_SPI_GetTransferSt atus function
Macros to check SPI events passed by cy_cb_scb_spi_handl e_events_t callback
Driver API for UART
Macros to check UART RX FIFO status returned by Cy_SCB_UART_GetRxFifoSt atus function or assign mask for Cy_SCB_UART_ClearRxFifoSt atus function
Macros to check UART TX FIFO status returned by Cy_SCB_UART_GetTxFifoSt atus function or assign mask for Cy_SCB_UART_ClearTxFifoSt atus function
Macros to check current UART receive status returned by Cy_SCB_UART_GetReceiveSta tus function
Macros to check current UART transmit status returned by Cy_SCB_UART_GetTransmitSta tus function
Macros to check UART events passed by cy_cb_scb_uart_handle _events_t callback
This driver provides the user an easy method for accessing standard Host Controller Interface (HCI) registers and provides some simple functionality on top of the HCI for reading and writing data to an SD card, eMMc card or a SDIO device
The masks below can be used to check the CURRENT_STATE bitfield of the Cy_SD_Host_GetCardS tatus function return value
The masks below can be used with the Cy_SD_Host_GetCardS tatus function
The masks below can be used with the Cy_SD_Host_G etScr function
The masks below can be used with the Cy_SD_Host_G etCid function
The masks below are for CSD Register Version 2.0 and can be used with the Cy_SD_Host_G etCsd function
The constants below can be used with Cy_SD_Host_GetNormalInterruptS tatus, ` Cy_SD_Host_ClearNormalInterruptS tatus <group__group__sd__host__i nterrupt__functions.html#ga95975 e199a0669a600e2fe5ada69b892>`__, Cy_SD_Host_GetErrorInterrupt Status and Cy_SD_Host_ClearErrorInterrupt Status functions
The constants below can be used with the Cy_SD_Host_GetPresent State function
The Segment LCD Driver provides an API to configure and operate the MXLCD hardware block
The Smart I/O driver provides an API to configure and access the Smart I/O hardware present between the GPIOs (pins) and HSIOMs (pin muxes) on select device ports
Constants for selecting the Smart I/O channels
The SPI-based communication interface to the external quad SPI (QSPI) high-speed memory devices
Basic flow for read/write commands using Cy_SMIF_Transmi tCommand, Cy_SMIF_Tran smitData, Cy_SMIF_Re ceiveData and Cy_SMIF_SendDu mmyCycles
The driver supports SysPm callback for Deep Sleep and Hibernate transition
The driver supports SysPm callback for Deep Sleep and Hibernate transition
General hierarchy of memory structures are:
Provides device startup, system configuration, and linker script files
This driver provides an interface for configuring the Analog Reference (AREF) block and querying the INTR_CAUSE register of the PASS
The System Clock (SysClk) driver contains the API for configuring system and peripheral clocks
Constants used for expressing ECO status
The External Clock Source (EXTCLK) is a clock source routed into PSoC through a GPIO pin
The External Crystal Oscillator (ECO) is a clock source that consists of an oscillator circuit that drives an external crystal through its dedicated ECO pins
Clock paths are a series of multiplexers that allow a source clock to drive multiple clocking resources down the chain
The FLL is a clock generation circuit that can be used to produce a higher frequency clock from a reference clock
The PLL is a clock generation circuit that can be used to produce a higher frequency clock from a reference clock
The ILO operates with no external components and outputs a stable clock at 32.768 kHz nominal
PILO provides a higher accuracy 32.768 kHz clock than the ILO
These functions measure the frequency of a specified clock relative to a reference clock
These functions perform a single trim operation on the ILO or PILO
Entering and exiting low power modes require compatible clock configurations to be set before entering low power and restored upon wake-up and exit
The WCO is a highly accurate 32.768 kHz clock source capable of operating in all power modes (excluding the Off mode)
Multiple high frequency clocks (CLK_HF) are available in the device
The fast clock drives the “fast” processor (e.g
The peripheral clock is a divided clock of CLK_HF0 (HF Clocks)
There are multiple peripheral clock dividers that, in effect, create multiple separate peripheral clocks
The slow clock is the source clock for the “slow” processor (e.g
In the BLE-enabled PSoC6 devices, the BLE ECO (BLE ECO Clock) clock is connected to the system Alternative High-Frequency Clock input
The low-frequency clock is the source clock for the MCWDT (Multi-Counter Watchdo g) and can be the source clock for Backup Domain Clock, which drives the RTC (Real-Time Cl ock)
The timer clock can be a source for the alternative clock driving the SysTick (ARM System Timer)
The pump clock is a clock source used to provide analog precision in low voltage applications
The backup domain clock drives the RTC (Real-Time Cl ock)
The Medium Frequency Domain Clock is present only in SRSS_ver1_3
The SysInt driver provides an API to configure the device peripheral interrupts
The system libraries provide APIs that can be called in the user application to handle the timing, logical checking or register
Function status type codes
Defines for the Assert Classes and Levels
Define RESET_CAUSE mask values
Unique ID fields positions
Use the System Power Management (SysPm) driver to change power modes and reduce system power consumption in power sensitive designs
Defines for the CPU and system power modes status
Defines for the SysPm callbacks modes that can be skipped during execution
Provides vendor-specific SysTick API
The TCPWM driver is a multifunction driver that implements Timer Counter, PWM, and Quadrature Decoder functionality using the TCPWM block
Common API for the Timer Counter PWM Block
Selects which input to use
Configures how TCPWM inputs behave
Configures how TCPWM output triggers behave (TCPWM_v2 only)
Interrupt Sources
Default constants for CNT Registers
Driver API for Timer/Counter
Run modes for the counter timer
The counter directions
The clock prescaler values
A compare or capture mode
The counter status
Driver API for PWM
Run modes for the pwm timer
Sets the PWM modes
Sets the alignment of the PWM
Sets the kill mode for the PWM
Specifies the behavior of the PWM outputs while PWM is disabled
Specifies the PWM output line
Clock prescaler values
Output invert modes
The counter status
Driver API for Quadrature Decoder
The quadrature decoder mode
The quadrature decoder resolution
The quadrature capture modes
The counter status
Driver API for Shift Register
Clock prescaler values
Specifies the Shift Register output line
Output invert modes
Specifies the behavior of the Shift Register outputs while Shift Register is disabled
The Shift Register status
The trigger multiplexer provides access to the multiplexer that selects a set of trigger output signals from different peripheral blocks to route them to the specific trigger input of another peripheral block
The USBFS driver provides an API to interact with a fixed-function USB block
The Initialization functions provide an API to begin the USBFS driver operation (configure and enable) and to stop operation (disable and de-initialize)
The Functions Interrupt functions provide an API to register callbacks for interrupt events provided by the USB block, interrupt handler, and configuration functions
The Endpoint 0 Service functions provide an API to establish communication with the USB Host using control endpoint 0
The Data Endpoint Configuration Functions provide an API to allocate and release hardware resources and override the memcpy function for the data endpoints
The Data Endpoint Transfer functions provide an API to establish communication with the USB Host using data endpoint
The Low-power functions provide an API to implement Low-power callback at the application level
The LPM functions provide an API to use the LPM feature available in the USB block
The Watchdog timer (WDT) has a 16-bit free-running up-counter