SD Host Present Status¶

group group_sd_host_macros_present_status

The constants below can be used with the Cy_SD_Host_GetPresentState function.

Each status is encoded in a separate bit, and therefore it is possible to notify about multiple statuses.

Defines

CY_SD_HOST_CMD_INHIBIT

Command Inhibit (CMD).

This bit indicates the following:

• SD/eMMC mode: If this bit is set to 0, it indicates that the CMD line is not in use and the Host controller can issue an SD/eMMC command using the CMD line. This bit is set when the command register is written. This bit is cleared when the command response is received. This bit is not cleared by the response of auto CMD12/23 but cleared by the response of the Read/Write command.

CY_SD_HOST_CMD_CMD_INHIBIT_DAT

Command Inhibit (DAT).

This bit is applicable for SD/eMMC mode and is generated if either the DAT line active or Read transfer active is set to 1. If this bit is set to 0, it indicates that the Host Controller can issue subsequent SD/eMMC commands.

CY_SD_HOST_DAT_LINE_ACTIVE

DAT Line Active (SD/eMMC Mode only).

This bit indicates whether one of the DAT lines on the SD/eMMC bus is in use. For Read transactions, this bit indicates whether a read transfer is executing on the SD/eMMC bus. For Write transactions, this bit indicates whether a write transfer is executing on the SD/eMMC bus. For a command with the Busy status, this status indicates whether the command executing busy is executing on an SD or eMMC bus.

CY_SD_HOST_DAT_7_4

DAT[7:4] Line Signal Level.

These bits are used to check the DAT line level to recover from errors and for debugging. These bits reflect the value of the sd_dat_in (upper nibble) signal.

CY_SD_HOST_WR_XFER_ACTIVE

Write Transfer Active This status indicates whether the Write transfer is active for SD/eMMC mode.

CY_SD_HOST_RD_XFER_ACTIVE

This bit indicates whether the Read transfer is active for SD/eMMC mode.

CY_SD_HOST_BUF_WR_ENABLE

Buffer Write Enable.

This bit is used for non-DMA transfers. This bit is set if space is available for writing data.

CY_SD_HOST_BUF_RD_ENABLE

This bit is used for non-DMA transfers. This bit is set if valid data exists in the Host buffer.

CY_SD_HOST_CARD_INSERTED

Card Inserted.

This bit indicates whether a card has been inserted. The Host Controller debounces this signal so that the Host Driver does not need to wait for the signal to stabilize.

CY_SD_HOST_CARD_STABLE

Card Stable.

This bit indicates the stability of the Card Detect Pin Level. A card is not detected if this bit is set to 1 and the value of the CARD_INSERTED bit is 0.

CY_SD_HOST_CARD_DETECT_PIN_LEVEL

Card Detect Pin Level.

This bit reflects the inverse synchronized value of the card_detect_n signal.

CY_SD_HOST_WR_PROTECT_SW_LVL

Write Protect Switch Pin Level.

This bit is supported only for memory and combo cards. This bit reflects the synchronized value of the card_write_prot signal.

CY_SD_HOST_DAT_3_0

DAT[3:0] Line Signal Level.

This bit is used to check the DAT line level to recover from errors and for debugging. These bits reflect the value of the sd_dat_in (lower nibble) signal.

CY_SD_HOST_CMD_LINE_LVL

Command-Line Signal Level.

This bit is used to check the CMD line level to recover from errors and for debugging. These bits reflect the value of the sd_cmd_in signal.

CY_SD_HOST_HOST_REG_VOL

Host Regulator Voltage Stable.

This bit is used to check whether the host regulator voltage is stable for switching the voltage of UHS-I mode. This bit reflects the synchronized value of the host_reg_vol_stable signal.

CY_SD_HOST_CMD_ISSU_ERR

Command Not Issued by Error.

This bit is set if a command cannot be issued after setting the command register due to an error except an Auto CMD12 error.

CY_SD_HOST_SUB_CMD_STAT

Sub Command Status.

This bit is used to distinguish between a main command and a sub command status.

CY_SD_HOST_IN_DORMANT_ST

In Dormant Status.

This bit indicates whether UHS-II lanes enter the Dormant state in the UHS-II mode. For SD/eMMC mode, this bit always returns 0.

CY_SD_HOST_LANE_SYNC

Lane Synchronization.

This bit indicates whether a lane is synchronized in UHSII mode. For SD/eMMC mode, this bit always returns 0.

CY_SD_HOST_UHS2_IF_DETECT

UHS-II Interface Detection.

This bit indicates whether a card supports the UHS-II interface. For SD/eMMC mode, this bit always returns 0.