FIFO buffer contlol Functions¶

group group_sar_functions_fifo

Functions

__STATIC_INLINE void Cy_SAR_FifoRead (const SAR_Type *base, cy_stc_sar_fifo_read_t *readStruct)

Reads FIFO word-by-word.

Function Usage

    /* Scenario: Enable FIFO before work */
    Cy_SAR_FifoEnable(SAR0);

    /* Scenario: Collect channel data from the FIFO */
    #define FIFO_DEPTH (64UL)
    #define CHAN_NUM   (16UL)
    
    cy_stc_sar_fifo_config_t fifoConfig =
    {
        .chanId = true, /* fifoRead.channel will contain channel number */
        .chainToNext = false, /* No FIFO chaining */
        .clrTrIntrOnRead = false, /* Interrupt is cleared by interrupt handler */
        .level = FIFO_DEPTH, /* FIFO depth is 64 if no chaining */
        .trOut = false /* Interrupt is used to get fifo data */
    };
    
    config.fifoCfgPtr = &fifoConfig;
    (void) Cy_SAR_Init(SAR0, &config); /* Initialize SAR with FIFO */
    Cy_SAR_Enable(SAR0); /* FIFO is enabled with SAR if if fifoCfgPtr is not NULL */
    
    /* Then, for example in the interrupt handler: */
    uint16_t sarResults[CHAN_NUM][FIFO_DEPTH];
    cy_stc_sar_fifo_read_t fifoRead;
    uint32_t numSamples = Cy_SAR_FifoGetDataCount(SAR0);

    for (uint32_t i = 0; i < numSamples; i++)
    {
        Cy_SAR_FifoRead(SAR0, &fifoRead);
        sarResults[fifoRead.channel][i] = fifoRead.value;
    }

    /* Scenario: FIFO is no more needed - reinitialize SAR without FIFO */
    Cy_SAR_Disable(SAR0); /* FIFO is disabled with SAR */
    config.fifoCfgPtr = NULL;
    (void) Cy_SAR_Init(SAR0, &config);
    Cy_SAR_Enable(SAR0); /* Now FIFO is not enabled with SAR if fifoCfgPtr = NULL */
    

Returns: Subsequent data sample

__STATIC_INLINE uint32_t Cy_SAR_FifoGetDataCount (const SAR_Type *base)

Returns a number of non-empty FIFO cells.

Function Usage

    /* Scenario: Enable FIFO before work */
    Cy_SAR_FifoEnable(SAR0);

    /* Scenario: Collect channel data from the FIFO */
    #define FIFO_DEPTH (64UL)
    #define CHAN_NUM   (16UL)
    
    cy_stc_sar_fifo_config_t fifoConfig =
    {
        .chanId = true, /* fifoRead.channel will contain channel number */
        .chainToNext = false, /* No FIFO chaining */
        .clrTrIntrOnRead = false, /* Interrupt is cleared by interrupt handler */
        .level = FIFO_DEPTH, /* FIFO depth is 64 if no chaining */
        .trOut = false /* Interrupt is used to get fifo data */
    };
    
    config.fifoCfgPtr = &fifoConfig;
    (void) Cy_SAR_Init(SAR0, &config); /* Initialize SAR with FIFO */
    Cy_SAR_Enable(SAR0); /* FIFO is enabled with SAR if if fifoCfgPtr is not NULL */
    
    /* Then, for example in the interrupt handler: */
    uint16_t sarResults[CHAN_NUM][FIFO_DEPTH];
    cy_stc_sar_fifo_read_t fifoRead;
    uint32_t numSamples = Cy_SAR_FifoGetDataCount(SAR0);

    for (uint32_t i = 0; i < numSamples; i++)
    {
        Cy_SAR_FifoRead(SAR0, &fifoRead);
        sarResults[fifoRead.channel][i] = fifoRead.value;
    }

    /* Scenario: FIFO is no more needed - reinitialize SAR without FIFO */
    Cy_SAR_Disable(SAR0); /* FIFO is disabled with SAR */
    config.fifoCfgPtr = NULL;
    (void) Cy_SAR_Init(SAR0, &config);
    Cy_SAR_Enable(SAR0); /* Now FIFO is not enabled with SAR if fifoCfgPtr = NULL */
    

Returns: Number of FIFO samples.

__STATIC_INLINE void Cy_SAR_FifoSetLevel (const SAR_Type *base, uint32_t level)

Sets the FIFO trigger level which specifies how many samples FIFO should contain in order to generate trigger event.

Parameters

base – Pointer to structure describing registers
level – The FIFO trigger level to be set. Range: 1..256.

Returns

None

__STATIC_INLINE void Cy_SAR_ClearFifoInterrupt (const SAR_Type *base, uint32_t intrMask)

Clear the FIFO interrupt.

The interrupt must be cleared with this function so that the hardware can set subsequent interrupts and those interrupts can be forwarded to the interrupt controller, if enabled.

Parameters

base – Pointer to structure describing registers
intrMask – The mask of interrupts to clear. Typically this will be the value returned from Cy_SAR_GetFifoInterruptStatus. Alternately, select one or more values from Interrupt Masks and “OR” them together.

Returns

None

__STATIC_INLINE void Cy_SAR_SetFifoInterrupt (const SAR_Type *base, uint32_t intrMask)

Trigger an interrupt with software.

Parameters

base – Pointer to structure describing registers
intrMask – The mask of interrupts to set. Select one or more values from Interrupt Masks and “OR” them together.

Returns

None

__STATIC_INLINE void Cy_SAR_SetFifoInterruptMask (const SAR_Type *base, uint32_t intrMask)

Enable which interrupts can trigger the CPU interrupt controller.

Parameters

base – Pointer to structure describing registers
intrMask – The mask of interrupts. Select one or more values from Interrupt Masks and “OR” them together:

Returns

None

__STATIC_INLINE uint32_t Cy_SAR_GetFifoInterruptStatus (const SAR_Type *base)

Return the interrupt register status.

Parameters: base – Pointer to structure describing registers
Returns: Interrupt status Interrupt Masks.

__STATIC_INLINE uint32_t Cy_SAR_GetFifoInterruptMask (const SAR_Type *base)

Return which interrupts can trigger the CPU interrupt controller as configured by Cy_SAR_SetFifoInterruptMask.

Parameters: base – Pointer to structure describing registers
Returns: Interrupt mask. Compare this value with masks in Interrupt Masks.

__STATIC_INLINE uint32_t Cy_SAR_GetFifoInterruptStatusMasked (const SAR_Type *base)

Return the bitwise AND between the interrupt request and mask registers.

See Cy_SAR_GetFifoInterruptStatus and Cy_SAR_GetFifoInterruptMask.

Parameters: base – Pointer to structure describing registers
Returns: Bitwise AND of the interrupt request and mask registers Interrupt Masks.