cy_scb_spi_8h

Provides SPI API declarations of the SCB driver.

Version

2.80

Licensed under the Apache License, Version 2.0 (the “License”); you may not use this file except in compliance with the License. You may obtain a copy of the License at

http://www.apache.org/licenses/LICENSE-2.0
Copyright

Copyright 2016-2021 Cypress Semiconductor Corporation SPDX-License-Identifier: Apache-2.0

Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an “AS IS” BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License.

Defines

CY_SCB_SPI_TX_TRIGGER

The number of entries in the TX FIFO is less than the TX FIFO trigger level value.

CY_SCB_SPI_TX_NOT_FULL

The TX FIFO is not full, there is a space for more data.

CY_SCB_SPI_TX_EMPTY

The TX FIFO is empty, note that there may still be data in the shift register.

CY_SCB_SPI_TX_OVERFLOW

An attempt to write to the full TX FIFO.

CY_SCB_SPI_TX_UNDERFLOW

Applicable only for the slave mode.

The master tried to read more data elements than available.

CY_SCB_SPI_RX_TRIGGER

The number of entries in the RX FIFO is more than the RX FIFO trigger level value.

CY_SCB_SPI_RX_NOT_EMPTY

The RX FIFO is not empty, there is data to read.

CY_SCB_SPI_RX_FULL

The RX FIFO is full.

There is no more space for additional data. Any additional data will be dropped.

CY_SCB_SPI_RX_OVERFLOW

The RX FIFO was full and there was an attempt to write to it.

This additional data was dropped.

CY_SCB_SPI_RX_UNDERFLOW

An attempt to read from an empty RX FIFO.

CY_SCB_SPI_SLAVE_ERR

The slave was deselected at the wrong time.

CY_SCB_SPI_MASTER_DONE

The master has transmitted all data elements from FIFO and shifter.

CY_SCB_SPI_TRANSFER_ACTIVE

Transfer operation started by Cy_SCB_SPI_Transfer is in progress.

CY_SCB_SPI_TRANSFER_IN_FIFO

All data elements specified by Cy_SCB_SPI_Transfer for transmission have been loaded into the TX FIFO.

CY_SCB_SPI_SLAVE_TRANSFER_ERR

The slave was deselected at the wrong time.

CY_SCB_SPI_TRANSFER_OVERFLOW

RX FIFO was full and there was an attempt to write to it.

This additional data was dropped.

CY_SCB_SPI_TRANSFER_UNDERFLOW

Applicable only for the slave mode.

The master tried to read more data elements than available in the TX FIFO.

CY_SCB_SPI_TRANSFER_IN_FIFO_EVENT

All data elements specified by Cy_SCB_SPI_Transfer for transmission have been loaded into the TX FIFO.

CY_SCB_SPI_TRANSFER_CMPLT_EVENT

The transfer operation started by Cy_SCB_SPI_Transfer is complete.

CY_SCB_SPI_TRANSFER_ERR_EVENT

An error occurred during the transfer.

This includes overflow, underflow and a transfer error. Check Cy_SCB_SPI_GetTransferStatus.

CY_SCB_SPI_DEFAULT_TX

Default TX value when no TX buffer is defined.

CY_SCB_SPI_RX_NO_DATA

Data returned by the hardware when an empty RX FIFO is read.

Typedefs

typedef void (*cy_cb_scb_spi_handle_events_t)(uint32_t event)

Provides the typedef for the callback function called in the Cy_SCB_SPI_Interrupt to notify the user about occurrences of SPI Callback Events.

Enums

enum cy_en_scb_spi_status_t

cy_en_scb_spi_status_t: SPI status codes.

Values:

enumerator CY_SCB_SPI_SUCCESS

Operation completed successfully.

enumerator CY_SCB_SPI_BAD_PARAM

One or more of input parameters are invalid.

enumerator CY_SCB_SPI_TRANSFER_BUSY

SPI is busy processing a transfer.

enum cy_en_scb_spi_mode_t

cy_en_scb_spi_mode_t: SPI Modes.

Values:

enumerator CY_SCB_SPI_SLAVE

Configures SCB for SPI Slave operation.

enumerator CY_SCB_SPI_MASTER

Configures SCB for SPI Master operation.

enum cy_en_scb_spi_sub_mode_t

cy_en_scb_spi_sub_mode_t: SPI Submodes.

Values:

enumerator CY_SCB_SPI_MOTOROLA

Configures an SPI for a standard Motorola SPI operation.

enumerator CY_SCB_SPI_TI_COINCIDES

Configures the SPI for the TI SPI operation.

In the TI mode, the slave select is a pulse. In this case, the pulse coincides with the first bit.

enumerator CY_SCB_SPI_NATIONAL

Configures an SPI for the National SPI operation.

This is a half-duplex mode of operation.

enumerator CY_SCB_SPI_TI_PRECEDES

Configures an SPI for the TI SPI operation, in the TI mode.

The slave select is a pulse. In this case the pulse precedes the first bit.

enum cy_en_scb_spi_sclk_mode_t

cy_en_scb_spi_sclk_mode_t: SPI SCLK Modes.

Values:

enumerator CY_SCB_SPI_CPHA0_CPOL0

Clock is active low, data is changed on first edge.

enumerator CY_SCB_SPI_CPHA1_CPOL0

Clock is active low, data is changed on second edge.

enumerator CY_SCB_SPI_CPHA0_CPOL1

Clock is active high, data is changed on first edge.

enumerator CY_SCB_SPI_CPHA1_CPOL1

Clock is active high, data is changed on second edge.

enum cy_en_scb_spi_slave_select_t

cy_en_scb_spi_slave_select_t: SPI Slave Selects.

Values:

enumerator CY_SCB_SPI_SLAVE_SELECT0

Master will use Slave Select 0.

enumerator CY_SCB_SPI_SLAVE_SELECT1

Master will use Slave Select 1.

enumerator CY_SCB_SPI_SLAVE_SELECT2

Master will use Slave Select 2.

enumerator CY_SCB_SPI_SLAVE_SELECT3

Master will use Slave Select 3.

enum cy_en_scb_spi_polarity_t

cy_en_scb_spi_polarity_t: SPI Polarity.

Values:

enumerator CY_SCB_SPI_ACTIVE_LOW

Signal in question is active low.

enumerator CY_SCB_SPI_ACTIVE_HIGH

Signal in question is active high.

enum cy_en_scb_spi_parity_t

cy_en_scb_spi_parity_t: SPI Parity.

note

This enum is available for CAT1B devices.

Values:

enumerator CY_SCB_SPI_PARITY_NONE

SPI has no parity check.

enumerator CY_SCB_SPI_PARITY_EVEN

SPI has even parity check.

enumerator CY_SCB_SPI_PARITY_ODD

SPI has odd parity check.

Functions

cy_en_scb_spi_status_t Cy_SCB_SPI_Init(CySCB_Type *base, cy_stc_scb_spi_config_t const *config, cy_stc_scb_spi_context_t *context)

Initializes the SCB for SPI operation.

note

If SCB is already enabled, ensure that the SCB block is disabled Cy_SCB_SPI_Disable before calling this function.

Parameters
  • base – The pointer to the SPI SCB instance.

  • config – The pointer to the configuration structure cy_stc_scb_spi_config_t.

  • context – The pointer to the context structure cy_stc_scb_spi_context_t allocated by the user. The structure is used during the SPI operation for internal configuration and data retention. The user must not modify anything in this structure. If only SPI Low-Level API will be used pass NULL as pointer to context.

Returns

cy_en_scb_spi_status_t

void Cy_SCB_SPI_DeInit(CySCB_Type *base)

De-initializes the SCB block; returns the register values to default.

note

Ensure that the SCB block is disabled Cy_SCB_SPI_Disable before calling this function.

Parameters

base – The pointer to the SPI SCB instance.

__STATIC_INLINE void Cy_SCB_SPI_Enable (CySCB_Type *base)

Enables the SCB block for the SPI operation.

Parameters

base – The pointer to the SPI SCB instance.

void Cy_SCB_SPI_Disable(CySCB_Type *base, cy_stc_scb_spi_context_t *context)

Disables the SCB block, clears context statuses, and disables TX and RX interrupt sources.

Note that after the block is disabled, the TX and RX FIFOs and hardware statuses are cleared. Also, the hardware stops driving the output and ignores the input. Refer to section Low Power Support for more information about SPI pins when SCB disabled.

note

Calling this function when the SPI is busy (master preforms data transfer or slave communicates with the master) may cause transfer corruption because the hardware stops driving the outputs and ignores the inputs. Ensure that the SPI is not busy before calling this function.

Parameters
  • base – The pointer to the SPI SCB instance.

  • context – The pointer to the context structure cy_stc_scb_spi_context_t allocated by the user. The structure is used during the SPI operation for internal configuration and data retention. The user must not modify anything in this structure. If only SPI functions that do not require context will be used to pass NULL as pointer to context.

__STATIC_INLINE void Cy_SCB_SPI_SetActiveSlaveSelect (CySCB_Type *base, cy_en_scb_spi_slave_select_t slaveSelect)

Selects an active slave select line from one of four available.

This function is applicable for the master and slave.

note

The SCB must be idle or disabled before calling this function.

Parameters
  • base – The pointer to the SPI SCB instance.

  • slaveSelect – The slave select line number. See cy_en_scb_spi_slave_select_t for the set of constants.

__STATIC_INLINE void Cy_SCB_SPI_SetActiveSlaveSelectPolarity (CySCB_Type *base, cy_en_scb_spi_slave_select_t slaveSelect, cy_en_scb_spi_polarity_t polarity)

Sets the active polarity for the slave select line.

note

The SCB must be idle or disabled before calling this function.

Parameters
__STATIC_INLINE bool Cy_SCB_SPI_IsBusBusy (CySCB_Type const *base)

Returns whether the SPI bus is busy or not.

The bus busy is determined using the slave select signal.

  • Motorola and National Semiconductor sub-modes: the bus is busy after the slave select line is activated and lasts until the slave select line is deactivated.

  • Texas Instrument sub-modes: The bus is busy the moment of the initial pulse on the slave select line and lasts until the transfer is complete (all bytes from the TX FIFO area shifted-out on the bus).

note

  • The SPI master does not assign the slave select line immediately after the first data element is written into the TX FIFO. It takes up to two SCLK clocks to assign the slave select line. Before this happens, the bus is considered idle.

  • If the SPI master is configured to transmit each data element separated by a de-assertion of the slave select line, the bus is busy during each element transfer and is free between them.

Parameters

base – The pointer to the SPI SCB instance.

Returns

True - the bus is busy; false - the bus is idle.

cy_en_scb_spi_status_t Cy_SCB_SPI_Transfer(CySCB_Type *base, void *txBuffer, void *rxBuffer, uint32_t size, cy_stc_scb_spi_context_t *context)

This function starts an SPI transfer operation.

It configures transmit and receive buffers for an SPI transfer. If the data that will be received is not important, pass NULL as rxBuffer. If the data that will be transmitted is not important, pass NULL as txBuffer and then the CY_SCB_SPI_DEFAULT_TX is sent out as each data element. Note that passing NULL as rxBuffer and txBuffer are considered invalid cases.

After the function configures TX and RX interrupt sources, it returns and Cy_SCB_SPI_Interrupt manages further data transfer.

  • In the master mode, the transfer operation starts after calling this function

  • In the slave mode, the transfer registers and will start when the master request arrives.

When the transfer operation is completed (requested number of data elements sent and received), the CY_SCB_SPI_TRANSFER_ACTIVE status is cleared and the CY_SCB_SPI_TRANSFER_CMPLT_EVENT event is generated.

note

  • The buffers must not be modified and must stay allocated until the end of the transfer.

  • This function overrides all RX and TX FIFO interrupt sources and changes the RX and TX FIFO level.

Parameters
  • base – The pointer to the SPI SCB instance.

  • txBuffer – The pointer of the buffer with data to transmit. The element size is defined by the data type that depends on the configured TX data width.

  • rxBuffer – The pointer to the buffer to store received data. The element size is defined by the data type that depends on the configured RX data width.

  • size – The number of data elements to transmit and receive.

  • context – The pointer to the context structure cy_stc_scb_spi_context_t allocated by the user. The structure is used during the SPI operation for internal configuration and data retention. The user must not modify anything in this structure.

Returns

cy_en_scb_spi_status_t

void Cy_SCB_SPI_AbortTransfer(CySCB_Type *base, cy_stc_scb_spi_context_t *context)

Aborts the current SPI transfer.

It disables the TX and RX interrupt sources, clears the TX and RX FIFOs and the status.

note

If slave aborts transfer and the master is still transferring data, that data will be placed in the RX FIFO, and the TX underflow will be set. To drop data received into the RX FIFO, RX FIFO must be cleared when the transfer is complete. Otherwise, received data will be kept and copied to the buffer when Cy_SCB_SPI_Transfer is called.

Side Effects

The transmit FIFO clear operation also clears the shift register, so that the shifter can be cleared in the middle of a data element transfer, corrupting it. The data element corruption means that all bits that have not been transmitted are transmitted as “ones” on the bus.

Parameters
  • base – The pointer to the SPI SCB instance.

  • context – The pointer to the context structure cy_stc_scb_spi_context_t allocated by the user. The structure is used during the SPI operation for internal configuration and data retention. The user must not modify anything in this structure.

uint32_t Cy_SCB_SPI_GetTransferStatus(CySCB_Type const *base, cy_stc_scb_spi_context_t const *context)

Returns the status of the transfer operation started by Cy_SCB_SPI_Transfer.

This status is a bit mask and the value returned may have a multiple-bit set.

note

The status is cleared by calling Cy_SCB_SPI_Transfer or Cy_SCB_SPI_AbortTransfer.

Parameters
  • base – The pointer to the SPI SCB instance.

  • context – The pointer to the context structure cy_stc_scb_spi_context_t allocated by the user. The structure is used during the SPI operation for internal configuration and data retention. The user must not modify anything in this structure.

Returns

SPI Transfer Status.

uint32_t Cy_SCB_SPI_GetNumTransfered(CySCB_Type const *base, cy_stc_scb_spi_context_t const *context)

Returns the number of data elements transferred since the last call to Cy_SCB_SPI_Transfer.

Parameters
  • base – The pointer to the SPI SCB instance.

  • context – The pointer to the context structure cy_stc_scb_spi_context_t allocated by the user. The structure is used during the SPI operation for internal configuration and data retention. The user must not modify anything in this structure.

Returns

The number of data elements transferred.

__STATIC_INLINE uint32_t Cy_SCB_SPI_Read (CySCB_Type const *base)

Reads a single data element from the SPI RX FIFO.

This function does not check whether the RX FIFO has data before reading it. If the RX FIFO is empty, the function returns CY_SCB_SPI_RX_NO_DATA.

note

  • This function only reads data available in the RX FIFO. It does not initiate an SPI transfer.

  • When in the master mode, this function writes data into the TX FIFO and waits until the transfer is completed before reading data from the RX FIFO.

Parameters

base – The pointer to the SPI SCB instance.

Returns

Data from the RX FIFO. The data element size is defined by the configured RX data width.

__STATIC_INLINE uint32_t Cy_SCB_SPI_ReadArray (CySCB_Type const *base, void *buffer, uint32_t size)

Reads an array of data out of the SPI RX FIFO.

This function does not block. It returns how many data elements were read from the RX FIFO.

note

  • This function only reads data available in the RX FIFO. It does not initiate an SPI transfer.

  • When in the master mode, this function writes data into the TX FIFO and waits until the transfer is completed before reading data from the RX FIFO.

Parameters
  • base – The pointer to the SPI SCB instance.

  • buffer – The pointer to the location to place data read from the RX FIFO. The element size is defined by the data type, which depends on the configured RX data width.

  • size – The number of data elements to read from the RX FIFO.

Returns

The number of data elements read from the RX FIFO.

__STATIC_INLINE uint32_t Cy_SCB_SPI_Write (CySCB_Type *base, uint32_t data)

Places a single data element in the SPI TX FIFO.

This function does not block. It returns how many data elements were placed in the TX FIFO.

note

  • When in the master mode, writing data into the TX FIFO starts an SPI transfer.

  • When in the slave mode, writing data into the TX FIFO does not start an SPI transfer. The data is loaded in the TX FIFO and will be sent to the master on its request.

  • The SPI interface is full-duplex, therefore reads and writes occur at the same time. Thus, for every data element transferred out of the TX FIFO, one is transferred into the RX FIFO.

Parameters
  • base – The pointer to the SPI SCB instance.

  • data – Data to put in the TX FIFO. The element size is defined by the data type, which depends on the configured TX data width.

Returns

The number of data elements placed in the TX FIFO: 0 or 1.

__STATIC_INLINE uint32_t Cy_SCB_SPI_WriteArray (CySCB_Type *base, void *buffer, uint32_t size)

Places an array of data in the SPI TX FIFO.

This function does not block. It returns how many data elements were placed in the TX FIFO.

note

  • When in the master mode, writing data into the TX FIFO starts an SPI transfer.

  • When in the slave mode, writing data into the TX FIFO does not start an SPI transfer. The data is loaded in the TX FIFO and will be sent to the master on its request.

  • The SPI interface is full-duplex, therefore reads and writes occur at the same time. Thus, for every data element transferred out of the TX FIFO, one is transferred into the RX FIFO.

Parameters
  • base – The pointer to the SPI SCB instance.

  • buffer – The pointer to the data to place in the TX FIFO. The element size is defined by the data type, which depends on the configured TX data width.

  • size – The number of data elements to transmit.

Returns

The number of data elements placed in the TX FIFO.

__STATIC_INLINE void Cy_SCB_SPI_WriteArrayBlocking (CySCB_Type *base, void *buffer, uint32_t size)

Places an array of data in the SPI TX FIFO.

This function blocks until the number of data elements specified by size is placed in the SPI TX FIFO.

note

  • When in the master mode, writing data into the TX FIFO starts an SPI transfer.

  • When in the slave mode, writing data into the TX FIFO does not start an SPI transfer. The data is loaded in the TX FIFO and will be sent to the master on its request.

  • The SPI interface is full-duplex, therefore reads and writes occur at the same time. Thus, for every data element transferred out of the TX FIFO, one is transferred into the RX FIFO.

Parameters
  • base – The pointer to the SPI SCB instance.

  • buffer – The pointer to data to place in the TX FIFO. The element size is defined by the data type, which depends on the configured TX data width.

  • size – The number of data elements to write into the TX FIFO.

__STATIC_INLINE uint32_t Cy_SCB_SPI_GetTxFifoStatus (CySCB_Type const *base)

Returns the current status of the TX FIFO.

Parameters

base – The pointer to the SPI SCB instance.

Returns

SPI TX FIFO Statuses

__STATIC_INLINE void Cy_SCB_SPI_ClearTxFifoStatus (CySCB_Type *base, uint32_t clearMask)

Clears the selected statuses of the TX FIFO.

note

Parameters
  • base – The pointer to the SPI SCB instance.

  • clearMask – The mask of which statuses to clear. See SPI TX FIFO Statuses for the set of constants.

__STATIC_INLINE uint32_t Cy_SCB_SPI_GetRxFifoStatus (CySCB_Type const *base)

Returns the current status of the RX FIFO.

Parameters

base – The pointer to the SPI SCB instance.

Returns

SPI RX FIFO Statuses

__STATIC_INLINE void Cy_SCB_SPI_ClearRxFifoStatus (CySCB_Type *base, uint32_t clearMask)

Clears the selected statuses of the RX FIFO.

note

Parameters
  • base – The pointer to the SPI SCB instance.

  • clearMask – The mask of which statuses to clear. See SPI RX FIFO Statuses for the set of constants.

__STATIC_INLINE uint32_t Cy_SCB_SPI_GetSlaveMasterStatus (CySCB_Type const *base)

Returns the current status of either the slave or the master, depending on the configured SPI mode.

Parameters

base – The pointer to the SPI SCB instance.

Returns

SPI Master and Slave Statuses

__STATIC_INLINE void Cy_SCB_SPI_ClearSlaveMasterStatus (CySCB_Type *base, uint32_t clearMask)

Clears the selected statuses of either the slave or the master.

Parameters
  • base – The pointer to the SPI SCB instance.

  • clearMask – The mask of which statuses to clear. See SPI Master and Slave Statuses for the set of constants.

__STATIC_INLINE uint32_t Cy_SCB_SPI_GetNumInTxFifo (CySCB_Type const *base)

Returns the number of data elements in the SPI TX FIFO.

note

This number does not include any data currently in the TX shifter.

Parameters

base – The pointer to the SPI SCB instance.

Returns

The number of data elements in the TX FIFO. The size of a data element defined by the configured TX data width.

__STATIC_INLINE bool Cy_SCB_SPI_IsTxComplete (CySCB_Type const *base)

Checks whether the TX FIFO and Shifter are empty and there is no more data to send.

Parameters

base – Pointer to the SPI SCB instance.

Returns

If true, transmission complete. If false, transmission is not complete.

__STATIC_INLINE uint32_t Cy_SCB_SPI_GetNumInRxFifo (CySCB_Type const *base)

Returns the number of data elements in the SPI RX FIFO.

note

This number does not include any data currently in the RX shifter.

Parameters

base – The pointer to the SPI SCB instance.

Returns

The number of data elements in the RX FIFO. The size of a data element defined by the configured RX data width.

__STATIC_INLINE void Cy_SCB_SPI_ClearRxFifo (CySCB_Type *base)

Clears all data out of the SPI RX FIFO.

Side Effects

Any data currently in the shifter is cleared and lost.

Parameters

base – The pointer to the SPI SCB instance.

__STATIC_INLINE void Cy_SCB_SPI_ClearTxFifo (CySCB_Type *base)

Clears all data out of the SPI TX FIFO.

Side Effects

The TX FIFO clear operation also clears the shift register; the shifter can be cleared in the middle of a data element transfer, corrupting it. The data element corruption means that all bits that have not been transmitted are transmitted as 1s on the bus.

Parameters

base – The pointer to the SPI SCB instance.

void Cy_SCB_SPI_Interrupt(CySCB_Type *base, cy_stc_scb_spi_context_t *context)

This is the interrupt function for the SCB configured in the SPI mode.

This function must be called inside the user-defined interrupt service routine for Cy_SCB_SPI_Transfer to work.

Parameters
  • base – The pointer to the SPI SCB instance.

  • context – The pointer to the context structure cy_stc_scb_spi_context_t allocated by the user. The structure is used during the SPI operation for internal configuration and data retention. The user must not modify anything in this structure.

__STATIC_INLINE void Cy_SCB_SPI_RegisterCallback (CySCB_Type const *base, cy_cb_scb_spi_handle_events_t callback, cy_stc_scb_spi_context_t *context)

Registers a callback function, which notifies that SPI Callback Events occurred in the Cy_SCB_SPI_Interrupt.

note

To remove the callback, pass NULL as the pointer to the callback function.

Parameters
  • base – The pointer to the SPI SCB instance.

  • callback – The pointer to the callback function. See cy_cb_scb_spi_handle_events_t for the function prototype.

  • context – The pointer to the context structure cy_stc_scb_spi_context_t allocated by the user. The structure is used during the SPI operation for internal configuration and data retention. The user should not modify anything in this structure.

cy_en_syspm_status_t Cy_SCB_SPI_DeepSleepCallback(cy_stc_syspm_callback_params_t *callbackParams, cy_en_syspm_callback_mode_t mode)

This function handles the transition of the SCB SPI into and out of Deep Sleep mode.

It prevents the device from entering Deep Sleep mode if the SPI slave or master is actively communicating, or there is any data in the TX or RX FIFOs. The following behavior of the SPI SCB depends on whether the SCB block is wakeup-capable or not:

  • Wakeup-capable: any transfer intended to the slave wakes up the device from Deep Sleep mode. The slave responds with 0xFF to the transfer and incoming data is ignored. If the transfer occurs before the device enters Deep Sleep mode, the device will not enter Deep Sleep mode and incoming data is stored in the RX FIFO. The SCB clock is disabled before entering Deep Sleep and enabled after the device exits Deep Sleep mode. The SCB clock disabling may lead to corrupted data in the RX FIFO. Clear the RX FIFO after this callback is executed. Note that for proper SPI operation after Deep Sleep the source of hf_clk[0] must be stable, this includes the FLL/PLL. The SysClk callback ensures that hf_clk[0] gets stable and it must be called before Cy_SCB_SPI_DeepSleepCallback. Only the SPI slave can be configured to be a wakeup source from Deep Sleep mode.

  • Not wakeup-capable: the SPI is disabled. It is enabled when the device fails to enter Deep Sleep mode or it is awakened from Deep Sleep mode. While the SPI is disabled, it stops driving the outputs and ignores the inputs. Any incoming data is ignored. Refer to section Low Power Support for more information about SPI pins when SCB disabled.

This function must be called during execution of Cy_SysPm_CpuEnterDeepSleep. To do it, register this function as a callback before calling Cy_SysPm_CpuEnterDeepSleep : specify CY_SYSPM_DEEPSLEEP as the callback type and call Cy_SysPm_RegisterCallback.

note

Only applicable for rev-08 of the CY8CKIT-062-BLE. For proper operation, when the SPI slave is configured to be a wakeup source from Deep Sleep mode, this function must be copied and modified by the user. The SPI clock disable code must be inserted in the CY_SYSPM_BEFORE_TRANSITION and clock enable code in the CY_SYSPM_AFTER_TRANSITION mode processing.

Parameters
Returns

cy_en_syspm_status_t

cy_en_syspm_status_t Cy_SCB_SPI_HibernateCallback(cy_stc_syspm_callback_params_t *callbackParams, cy_en_syspm_callback_mode_t mode)

This function handles the transition of the SCB SPI into Hibernate mode.

It prevents the device from entering Hibernate mode if the SPI slave or master is actively communicating, or there is any data in the TX or RX FIFOs. If the SPI is ready to enter Hibernate mode, it is disabled. If the device failed to enter Hibernate mode, the SPI is re-enabled. While the SPI is disabled, it stops driving the outputs and ignores the inputs. Any incoming data is ignored. Refer to section Low Power Support for more information about SPI pins when SCB disabled.

This function must be called during execution of Cy_SysPm_SystemEnterHibernate. To do it, register this function as a callback before calling Cy_SysPm_SystemEnterHibernate : specify CY_SYSPM_HIBERNATE as the callback type and call Cy_SysPm_RegisterCallback.

Parameters
Returns

cy_en_syspm_status_t

struct cy_stc_scb_spi_config_t
#include <>

SPI configuration structure.

Public Members

cy_en_scb_spi_mode_t spiMode

Specifies the mode of operation.

cy_en_scb_spi_sub_mode_t subMode

Specifies the submode of SPI operation.

cy_en_scb_spi_sclk_mode_t sclkMode

Configures the SCLK operation for Motorola sub-mode, ignored for all other submodes.

cy_en_scb_spi_parity_t parity

Configures the SPI parity.

note

This parameter is available for CAT1B devices.

bool dropOnParityError

Enables the hardware to drop data in the RX FIFO when a parity error is detected.

note

This parameter is available for CAT1B devices.

uint32_t oversample

Oversample factor for SPI.

  • For the master mode, the data rate is the SCB clock / oversample (the valid range is 4 to 16, when MISO is used; if MISO is not used then the valid range is 2 to 16).

  • For the slave mode, the oversample value is ignored. The data rate is determined by the SCB clock frequency.

uint32_t rxDataWidth

The width of RX data (valid range 4-16).

It must be the same as txDataWidth except in National sub-mode.

uint32_t txDataWidth

The width of TX data (valid range 4-16).

It must be the same as rxDataWidth except in National sub-mode.

bool enableMsbFirst

Enables the hardware to shift out the data element MSB first, otherwise, LSB first.

bool enableFreeRunSclk

Enables the master to generate a continuous SCLK regardless of whether there is data to send.

bool enableInputFilter

Enables a digital 3-tap median filter to be applied to the input of the RX FIFO to filter glitches on the line.

bool enableMisoLateSample

Enables the master to sample MISO line one half clock later to allow better timings.

bool enableTransferSeperation

Enables the master to transmit each data element separated by a de-assertion of the slave select line (only applicable for the master mode)

uint32_t ssPolarity

Sets active polarity of each SS line.

This is a bit mask: bit 0 corresponds to SS0 and so on to SS3. 1 means active high, a 0 means active low.

bool ssSetupDelay

Indicates the SPI SELECT setup delay (between SELECT activation and SPI clock).

‘0’: With this setting the same timing is generated as in SCB v1 block. CPHA=0: 0.75 SPI clock cycles CPHA=1: 0.25 SPI clock cycles ‘1’: With this setting an additional delay of 1 SPI clock cycle is generated. CPHA=0: 1.75 SPI clock cycles CPHA=1: 1.25 SPI clock cycles Only applies in SPI MOTOROLA submode and when SCLK_CONTINUOUS=0

note

This parameter is available for CAT1B devices.

bool ssHoldDelay

Indicates the SPI SELECT hold delay (between SPI clock and SELECT deactivation).

‘0’: With this setting the same timing is generated as in CAT1A devices. CPHA=0: 0.75 SPI clock cycles CPHA=1: 0.25 SPI clock cycles ‘1’: With this setting an additional delay of 1 SPI clock cycle is generated. CPHA=0: 1.75 SPI clock cycles CPHA=1: 1.25 SPI clock cycles Only applies in SPI MOTOROLA submode and when SCLK_CONTINUOUS=0

note

This parameter is available for CAT1B devices.

bool ssInterFrameDelay

Indicates the SPI SELECT inter-dataframe delay (between SELECT deactivation and SELECT activation).

‘0’: With this setting the same timing is generated as in CAT1A devices. CPHA=0: 0.75 SPI clock cycles CPHA=1: 0.25 SPI clock cycles ‘1’: With this setting an additional delay of 1 SPI clock cycle is generated. CPHA=0: 1.75 SPI clock cycles CPHA=1: 1.25 SPI clock cycles Only applies in SPI MOTOROLA submode and when SCLK_CONTINUOUS=0

note

This parameter is available for CAT1B devices.

bool enableWakeFromSleep

When set, the slave will wake the device when the slave select line becomes active.

Note that not all SCBs support this mode. Consult the device datasheet to determine which SCBs support wake from Deep Sleep.

uint32_t rxFifoTriggerLevel

When there are more entries in the RX FIFO then this level the RX trigger output goes high.

This output can be connected to a DMA channel through a trigger mux. Also, it controls the CY_SCB_SPI_RX_TRIGGER interrupt source.

uint32_t rxFifoIntEnableMask

Bits set in this mask will allow events to cause an interrupt (See SPI RX FIFO Statuses for the set of constant)

uint32_t txFifoTriggerLevel

When there are fewer entries in the TX FIFO then this level the TX trigger output goes high.

This output can be connected to a DMA channel through a trigger mux. Also, it controls the CY_SCB_SPI_TX_TRIGGER interrupt source.

uint32_t txFifoIntEnableMask

Bits set in this mask allow events to cause an interrupt (See SPI TX FIFO Statuses for the set of constants)

uint32_t masterSlaveIntEnableMask

Bits set in this mask allow events to cause an interrupt (See SPI Master and Slave Statuses for the set of constants)

struct cy_stc_scb_spi_context_t
#include <>

SPI context structure.

All fields for the context structure are internal. Firmware never reads or writes these values. Firmware allocates the structure and provides the address of the structure to the driver in function calls. Firmware must ensure that the defined instance of this structure remains in scope while the drive is in use.