HAL API Reference¶
The following provides a list of HAL API documentation
This section documents the basic types and macros that are used by multiple HAL drivers
Defines a type and related utilities for function result handling
This section documents the basic types that are used by multiple HAL drivers
HAL specific return codes definitions for all drivers
ADC specific return codes
Clock specific return codes
Comparator specific return codes
CRC specific return codes
DAC specific return codes
DMA specific return codes
EZI2C specific return codes
Flash specific return codes
GPIO specific return codes
HWMGR specific return codes
I2C specific return codes
I2S specific return codes
Interconnect specific return codes
LPTimer specific return codes
Opamp specific return codes
PDM/PCM specific return codes
PWM specific return codes
QSPI specific return codes
Quadrature Decoder specific return codes
RTC specific return codes
SDHC specific return codes
SDIO specific return codes
SPI specific return codes
SYSPM specific return codes
TDM specific return codes
Timer specific return codes
TRNG specific return codes
UART specific return codes
USB Device specific return codes
WDT specific return codes
Interface for changing power states and restricting when they are allowed
SYSPM specific return codes
Interface for getting and changing clock configuration
Clock specific return codes
These macros can be defined to a custom value globally to modify the behavior of the HAL
The following types are used by the HAL, but are defined by the implementation
This section documents the macros that can be used to check if a specific driver is available for the current device
This section documents the drivers which form the stable API of the Cypress HAL
High level interface for interacting with the analog to digital converter (ADC)
ADC specific return codes
Interface for getting and changing clock configuration
Clock specific return codes
High level interface for interacting with an analog Comparator
Comparator specific return codes
High level interface for interacting with the CRC, which provides hardware accelerated CRC computations
CRC specific return codes
High level interface for interacting with the digital to analog converter (DAC)
DAC specific return codes
High level interface for interacting with the direct memory access (DMA)
DMA specific return codes
High level interface for interacting with the Cypress EZ Inter-Integrated Circuit (EZI2C)
EZI2C specific return codes
High level interface to the internal flash memory
Flash specific return codes
Interface for changing power states and restricting when they are allowed
SYSPM specific return codes
High level interface for configuring and interacting with general purpose input/outputs (GPIO)
GPIO specific return codes
High level interface to the Hardware Manager
HWMGR specific return codes
High level interface for interacting with the I2C resource
I2C specific return codes
High level interface for interacting with the Inter-IC Sound (I2S)
I2S specific return codes
High level interface to the Cypress digital routing
Interconnect specific return codes
High level interface for interacting with the KeyScan
High level interface for interacting with the low-power timer (LPTimer)
LPTimer specific return codes
High level interface for interacting with the Operational Amplifier (Opamp)
Opamp specific return codes
PDM/PCM (Pulse-Density Modulation to Pulse-Code Modulation Converter)
High level interface for interacting with the pulse-density modulation to pulse-code modulation (PDM/PCM) converter
PDM/PCM specific return codes
High level interface for interacting with the pulse width modulator (PWM) hardware resource
PWM specific return codes
High level interface for interacting with the Quad-SPI interface
QSPI specific return codes
High level interface for interacting with the Quadrature Decoder hardware resource
Quadrature Decoder specific return codes
High level interface for interacting with the real-time clock (RTC)
RTC specific return codes
High level interface to the Secure Digital Host Controller (SDHC)
SDHC specific return codes
High level interface to the Secure Digital Input Output (SDIO)
SDIO specific return codes
High level interface for interacting with the Serial Peripheral Interface (SPI)
SPI specific return codes
High level interface for interacting with reset and delays
High level interface for interacting with the Time Division Multiplexed controller (TDM)
TDM specific return codes
High level interface for interacting with the Timer/Counter hardware resource
Timer specific return codes
High level interface to the True Random Number Generator (TRNG)
TRNG specific return codes
High level interface for interacting with the Universal Asynchronous Receiver-Transmitter (UART)
UART specific return codes
High level interface for interacting with the USB Device
USB Device specific return codes
APIs relating to endpoint management
APIs relating specifically to management of endpoint zero
High level interface to the Watchdog Timer (WDT)
WDT specific return codes
This section provides details about the CAT1 (PSoC 6) implementation of the Cypress HAL
The following CAT1 specific items have been deprecated and replaced by more generic items
Implementation specific interface for using the Clock driver
Implementation of the analog comparator (COMP) driver on top of the CTB opamps
Implementation of the analog comparator (COMP) driver on top of the LP (low power) comparator
DW (DataWire) is one of two DMA hardware implementations for CAT1 (PSoC 6)
Implementation specific interface for using the DMAC DMA peripheral
Implementation specific interface for using the Datawire DMA peripheral
Aliases for types which are part of the public HAL interface but whose representations need to vary per HAL implementation
The interconnect system connects the various hardware peripherals using trigger signals
Definitions for the pinout for each supported device
Pin definitions and connections specific to the PSoC6_01 104-M-CSP-BLE package
Pin definitions and connections specific to the PSoC6_01 104-M-CSP-BLE-USB package
Pin definitions and connections specific to the PSoC6_01 116-BGA-BLE package
Pin definitions and connections specific to the PSoC6_01 116-BGA-USB package
Pin definitions and connections specific to the PSoC6_01 124-BGA package
Pin definitions and connections specific to the PSoC6_01 124-BGA-SIP package
Pin definitions and connections specific to the PSoC6_01 43-SMT package
Pin definitions and connections specific to the PSoC6_01 68-QFN-BLE package
Pin definitions and connections specific to the PSoC6_01 80-WLCSP package
Pin definitions and connections specific to the PSoC6_02 100-WLCSP package
Pin definitions and connections specific to the PSoC6_02 124-BGA package
Pin definitions and connections specific to the PSoC6_02 128-TQFP package
Pin definitions and connections specific to the PSoC6_02 68-QFN package
Pin definitions and connections specific to the PSoC6_03 100-TQFP package
Pin definitions and connections specific to the PSoC6_03 49-WLCSP package
Pin definitions and connections specific to the PSoC6_03 68-QFN package
Pin definitions and connections specific to the PSoC6_04 64-TQFP-EPAD package
Pin definitions and connections specific to the PSoC6_04 68-QFN package
Pin definitions and connections specific to the PSoC6_04 80-TQFP package
Pin definitions and connections specific to the CYW20829 56-QFN package
Pin definitions and connections specific to the MXS28PLAYERMCUSS 128-TQFP package
The CAT1 (PSoC 6) Power Management has the following characteristics: CYHAL_SYSPM_SYSTEM_NORMAL equates to the Low Power mode CYHAL_SYSPM_SYSTEM_LOW equates to the Ultra Low Power mode
Trigger connections for supported device families
Trigger connections for psoc6_01
Trigger connections for psoc6_02
Trigger connections for psoc6_03
Trigger connections for psoc6_04
Trigger connections for cyw20829
Trigger connections for mxs28playermcuss
Initialization polynomial values for the True Random Number Generator
The CAT1 (PSoC 6) WDT is only capable of supporting certain timeout ranges below its maximum timeout
On CAT1 (PSoC 6), the COMP driver can use either of two underlying hardware blocks:
The CAT1 (PSoC 6) I2S Supports the following values for word lengths:
The maximum number of ticks that can set to an LPTIMER is 0xFFF0FFFF
PDM/PCM (Pulse Density Modulation to Pulse Code Modulation Converter)
The CAT1 (PSoC 6) PDM/PCM Supports the following conversion parameters:
Internally the CAT1 (PSoC 6) RTC only stores the year as a two digit BCD value (0-99); no century information is stored
The SHDC HAL implemenation for PSoC 6 provides implementations for the following weak functions specified by the PDL to make their usage in SDHC HAL driver more flexible by providing user ability to use card detect, write protect, pwr en, and io select signals on custom pins instead of dedicated SDHC block pins
The CAT1 (PSoC 6) TDM Supports the following values for word lengths:
The UDB based SDIO interface allows for communicating between a PSoC 6 and a Cypress wireless device such as the CYW4343W, CYW43438, or CYW43012